FPGA (Field Programmable Gate Array) is a chip containing a matrix of logic cells with programmable interconnects, which can be configured by a user. By configuring the function of each logic cell and the way they are connected between each other, one can make FPGA implement any digital circuit (limited only by the capacity of the device).
Xilinx offers the broadest portfolio of FPGAs providing advanced features, lowest power, highest performance, and highest value for any FPGA-based design. Xilinx is the world’s leading provider of All Programmable FPGA’s, SoC’s and 3D ICs. These industry leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration.
Design and simulation is facilitated by easy-to-use and intuitive Electronic Design Automation (EDA) tool Multisim 12.0 from National Instruments. NI Multisim (formerly known as Electronics Workbench) is an electronic schematic capture and simulation program which is part of a suite of circuit design programs, along with NI Ultiboard. Multisim is one of the few circuit design programs to employ the original Berkeley SPICE based software simulation. Multisim was originally created by a company named Electronics Workbench, which is now a division of National Instruments. Multisim includes microcontroller simulation (formerly known as MultiMCU), PLD design (exporting VHDL code) as well as integrated import and export features to the Printed Circuit Board layout software in the suite, NI Ultiboard. Multisim is widely used in academia and industry for circuits education, electronic schematic design and SPICE simulation.
Implentation is made easy in FPGA boards from Digilent. Digilent’s Xilinx-based programmable logic boards are built around the latest FPGA technologies and time-tested solutions that offer robust performance at a very low price. Most boards feature on-board USB power & programming, and cost less than the price of a textbook.
Design and Simulation
The alarm circuit will light up a LED (LD0) on Spartan 3 Starter kit board only when the key (SW1) is in the ignition and either the door (SW2) is open or the seatbelt (SW0) is not fastened. The variables are:
Hence the Truth table is:
Where A = Door, B= Key and C = Belt
The Karnaugh map of this Truth table is:
The resulting Boolean expression is Y = A’B + BC’ which translated into logic circuit is:
We will next simulate and test the Truth table in MultiSim 12.0.
Run Multisim 12.0. Start a new design in menu File -> New -> PLD Design…
In Step 1 choose
Press Next > and then in Step 2 window in PLD Design name field write Car_Alarm. In PLD part number (optional) field write XC3S200 which is the FPGA on Spartan 3 Starter Kit.
Note: The option of Create empty PLD is a recent one in Multisim – it may not be available in earlier versions.
Press Next > and the final step window will open
Do not change anything here. Just press the Finish button.
You will now see the Multisim workspace for PLD design. Add input and output connectors. The respective buttons are on the top left corner just below Multisim workspace’s menu bar:
Change the names of these connectors to DOOR, KEY, SEAT and ALARM and rearrange the layout of the connectors in a way to have ample space between input and output connectors.
We will now use test and measurement tools in Multisim to generate the Boolean expression from Truth table, and then obtain our respective logic circuit.
Bring into Multisim workspace Logic converter instrument by pressing onto the icon for Logic converter found at instruments’ tool bar on the right side of Multisim worksapce. The image on workspace looks like this:
Press onto the Logic converter instrument and you will see the conversion setup.
Fill up the Truth table by pressing onto A, B, and C buttons and change the question marks of results ? into respective 0s or 1s according to the Truth table at the beginnng of this post, and as shown in the image above. Now press the button:
The result will be:
This resulting Boolean expression A’B + BC’ is exactly the same as we obtained manually from Karnaugh map at the beginning of this post.
We are now ready for the automatic logic conversion offered by Multism 12.0. Press onto the button:
We are now ready to simulate, and test the logic circuit. Bring into Multisim workspace Word generator instrument by pressing onto the icon of Word generator found at the instruments’ tool bar on the right side of Multisim workspace. Connect up the Word generator as shown and place the Probe found at the icons bar below the menu bar at top of the workspace:
Press onto Word generator instrument. We will set the right word pattern. Press onto Set button:
The set up window will open. Change the Buffer size to 0010 and in Preset patterns choose Up counter:
In Controls press Step button and in Display choose Binary. After you have done this, close the Word generator‘s window. And now place Probe – icon found at the top menu bar – into the PLD workspace and connect the circuit for simulation as shown:
We are ready to simulate. Open the Word generator press onto the Step button and certify that the Truth table we have decided upon earlier is what is seen in the simulation:
As in our original Truth table, the logic circuit will behave as expected and results can be seen step by step on the Probe lighting up or switching off. We are now ready to export the Multisim circuit to VHDL.
Connect the logic circuit as shown, and remove the Word generator instrument, the Probe as well as any other remnants of our simultaion:
Now on the top of workspace’s menu choose Tools -> Export to PLD…
Export to PLD window will open:
Press the button Ok and the results will be shown, hopefully without any errors or warnings:
A Car_alarm.vhd file has been exported.
The Multisim simulation files and exported VHDL file can downloaded from here.
A special credit is due to Project Navigator Tutorial at Brigham Young University site, for the truth table that serves as the basis for tutorial. Our appraoch is completely different.
We have designed and simulated a logic circuit in Multisim 12.0 and exported the circuit as VHDL. In part II we will program and test the logic circuit in a Digilent Spartan 3 FPGA Starter kit board.