Tag Archives: Karnaugh Map

Design and Simulate a 4-Bit Parity Generator in Multisim and Implement on a Digilent Basys 2 Spartan-3E FPGA Board

Introduction Parity bits are extra signals which are added to a data word to enable error checking. There are two types of parity – even and odd. An even Parity Generator will produce a logic 1 at its output if … Continue reading

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